June 14, 2024


The Joy of Technology

Rumor: AMD’s RDNA3 GPU to Feature Seven Chiplets


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As we head into spring flowers are starting to bloom, and Twitter is also beginning to blossom with fresh GPU rumors. So far there’s been a lot of reporting on Nvidia’s next-gen Ada Lovelace architecture. Rumors from AMD, however, have been exceedingly rare. Interestingly the Nvidia rumors point to a nuclear reactor GPU consuming 600W of power. This has lead people to wonder why Nvidia would be going all out on power consumption, and the answer might be obvious: because it must.

The latest rumor comes from noted leaker Greymon55 on Twitter, who is a prolific GPU tipster. Their latest intel is that AMD’s RDNA3 GPU will be comprised of seven chiplets. There will be two 5nm Graphic Complex Dies (GCD), four 6nm Memory Complex Dies (MCD), and an interconnect. Though variations of these rumors were previously reported, it wasn’t clear how many chiplets AMD would be using. All of these chiplets will be produced by TSMC, and it will be AMD”s first Multi-Chip Module (MCM) GPU. For those living under rocks, AMD has already been producing chiplet-based CPUs for years now, so this is not its first rodeo. One interesting twist in the rumors is the MCD was previously reported to be called a Multi-Cache Die, but now its name has changed. Videocardz reports that nobody is sure what it does. It’s also not clear if it’s vertically stacked on the GCD or just on the package somewhere. It was previously reported the GPU would offer 256MB of Infinity Cache per module for 512MB total. It’s quite possible that cache could be part of the MCD.


Having multiple, smaller chiplets versus one monolithic die allows for better yields. It’s also seen as the sensible direction for chip packaging to move towards as huge dies on advanced nodes are becoming increasingly difficult to manufacture. Despite the difficulty, Nvidia is sticking to its monolithic guns for its next-gen Lovelace GPUs. However, there are rumors that it will probably the company’s last GPU with that design. Back in January Nvidia published a research paper about how its examining MCM designs for future products.

The particular challenge of chiplets, where GPUs are concerned, is keeping interconnect power under control. CPUs communicate with each other as well, but GPUs are designed for parallel processing in ways that CPUs are not. AMD, Nvidia, and Intel will all have to solve these challenges to bring MCM-based GPUs to market.

Despite moving to smaller chiplets instead of a huge die, RDNA3 should be quite powerful. As we previously reported, there should be 7,680 cores per GCD, and 15,360 cores total. This compares to 5,120 “streaming processors” in the current RX 6900 XT. AMD is clearly heading in a radical new direction. Other tantalizing rumors include the GPU will offer 32GB of GDDR6 memory on a 256-bit memory bus. That’s quite small for this many cores.

Though Nvidia’s Lovelace flagship will likely offer a wider 384-bit memory bus, AMD’s generous on-die cache might level the playing field. However, Nvidia is already preparing for that, and is also rumored to be increasing the L2 cache on Lovelace significantly. The latest rumors, which are based on the Lapsus$ hack of Nvidia, suggest team green will be upping its L2 allotment by a staggering 16x. That means it’ll be going from 6MB on Ampere, to 96MB with Lovelace. That’s still theoretically less than AMD will offer, though we don’t have firm numbers on next-gen Infinity Cache allotments. Either way, this upcoming GPU showdown is going to be one for the ages. Our power supplies are already sweating just thinking about it.

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